Alphawave Semi, a global leader in high-speed connectivity and compute silicon, has recently been recognised with the TSMC 2024 OIP Partner of the Year Award for High-Speed SerDes IP. This marks the fifth consecutive year that Alphawave Semi has been honoured for its contributions to design enablement within TSMC’s Open Innovation Platform (OIP) ecosystem.
The award was presented at the TSMC OIP Ecosystem Forum, where Alphawave Semi was acknowledged for its advancements in silicon connectivity. Their achievements include multi-standard SerDes solutions supporting up to 224Gbps, encompassing technologies like Ethernet and PCIe on advanced processes. Additionally, their ZeusCORE100® 1-112Gbps NRZ/PAM4 SerDes on TSMC’s N3E process was highlighted. This forum served as a platform for semiconductor design partners and TSMC customers to explore cutting-edge technologies applicable to sectors such as high-performance computing (HPC), mobile, automotive, and IoT.
Tony Pialis, CEO and co-founder of Alphawave Semi, expressed the importance of the ongoing collaboration with TSMC. He pointed to the significant achievements over the past year, particularly the deployment of their first test chip on TSMC’s N3P process. Pialis noted how this partnership continues to drive advancements in connectivity solutions tailored for networking, servers, and storage, meeting the evolving demands of both hyperscalers and semiconductor clients.
Dan Kochpatcharin, head of the Ecosystem and Alliance Management Division at TSMC, emphasised the importance of collaboration in driving innovation. He noted that TSMC and Alphawave Semi are providing engineering teams with cutting-edge solutions, enabling more complex designs on advanced process nodes. Kochpatcharin also mentioned how these awards underscore the critical role that OIP ecosystem partners like Alphawave Semi play in creating the next generation of high-performance designs, delivering enhanced efficiency and faster time to market.
During the event, Alphawave Semi’s VP of IP Product Marketing, Letizia Giuliano, together with Sridhar Valluru from Arm, delivered a presentation titled “Architecting Next-Generation Terabit AI Networks with The Industry’s First Multi-Protocol I/O Connectivity Chiplet”. This talk explored the challenges of scaling AI and highlighted the crucial role of UCIe-enabled AI chiplets in addressing the limitations present in advanced SoCs.
Among the innovations presented by Alphawave Semi were the industry’s first-ever 3nm UCIe IP using TSMC’s CoWoS packaging, and the successful tape-out of the first multi-protocol I/O connectivity chiplet designed for AI infrastructure. Additionally, attendees at the forum had the opportunity to witness a live demonstration of Alphawave Semi’s UCIe chiplet, showcasing 24 Gbps per lane die-to-die communication, a significant milestone for high-performance computing.
The company also displayed its HBM3E subsystem, aimed at AI workloads, and its 128G PCIe 7.0 over optics IP, underlining its commitment to supporting the increasing demands of AI and high-performance computing systems.
Alphawave IP Group plc (LON:AWE) is a semiconductor IP company focused on providing DSP based, multi-standard connectivity Silicon IP solutions targeting both data processing in the Datacenter and data generation by IoT end devices.
