Alphawave Semi advances open chiplet ecosystem with groundbreaking designs

The open chiplet ecosystem is gradually taking shape, driven by innovative design demonstrations. Alphawave Semi has announced the tape-out of what it claims to be the industry’s first off-the-shelf multi-protocol I/O connectivity chiplet on TSMC’s 7-nm process node. This multi-standard I/O chiplet employs an IP portfolio compliant with Ethernet, PCIe, CXL, and Universal Chiplet Interconnect Express (UCIe) Revision 1.1 standards. It delivers a total bandwidth of up to 1.6 Tbps, with up to 16 lanes of multi-standard PHY supporting silicon-proven PCIe 6.0, CXL 3.x, and 800G Ethernet IPs.

A few months earlier, Alphawave Semi announced the development of a chiplet connectivity platform on TSMC’s 3-nm process node. This platform features a UCIe subsystem comprising PHY and controller, capable of delivering 24 Gbps data rates. The 24-Gbps UCIe subsystem complies with the UCIe Revision 1.1 specification and includes a highly configurable die-to-die controller supporting streaming, PCIe/CXLTM, AXI-4, AXI-S, CXS, and CHI protocols. Alphawave Semi showcased these designs at the Chiplet Summit 2024 in Santa Clara, California.

In its quest to pave the way for open chiplet ecosystems, Alphawave Semi has also partnered with Arm on the compute side. Recently, it announced the development of a compute chiplet built on Arm Neoverse Compute Subsystems (CSS) for artificial intelligence (AI) and machine learning (ML), high-performance computing (HPC), data centre, and 5G/6G networking infrastructure applications. This collaboration brings a portfolio to Alphawave Semi that includes IO extension chiplets, memory chiplets, and compute chiplets. Combining Arm’s compute building blocks with Alphawave Semi’s connectivity IP will further bolster the creation of an open chiplet ecosystem.

The chiplet design examples outlined above indicate a clear trend: the development of key chiplet building blocks is steadily advancing, enhancing the multi-protocol ecosystem. With the maturation of chiplet standards like UCIe and the availability of silicon-proven chiplet subsystems, design engineers can reduce development time, lower costs, and create greater synergy with their existing hardware ecosystems.

Alphawave IP Group plc (LON:AWE) is a semiconductor IP company focused on providing DSP based, multi-standard connectivity Silicon IP solutions targeting both data processing in the Datacenter and data generation by IoT end devices.

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