Alphawave Semi, a global leader in high-speed connectivity and compute silicon, has announced the availability of the industry’s first 3nm silicon-proven Universal Chiplet Interconnect Express (UCIe™) Die-to-Die (D2D) IP subsystem. Built using TSMC’s Chip-on-Wafer-on-Substrate (CoWoS®) advanced packaging technology, this innovation caters to demanding applications such as hyperscale data centres, high-performance computing (HPC), and artificial intelligence (AI).
This integrated and configurable subsystem, developed in partnership with TSMC, delivers a bandwidth density of 8 Tbps/mm and optimises I/O complexity, power efficiency, and latency. The solution employs TSMC’s CoWoS 2.5D silicon-interposer-based packaging, enabling superior performance for D2D connectivity. The subsystem supports multiple protocols, including PCIe®, CXL™, AXI-4, and CXS, enhancing its interoperability within the chiplet ecosystem. Live per-lane health monitoring adds robustness, while operational speeds of 24 Gbps ensure the high bandwidth required for next-gen computing tasks.
After extensive silicon validation, which involved testing across different process conditions and voltage/temperature ranges, Alphawave Semi has confirmed that the UCIe IP subsystem meets all UCIe standards. The successful validation of link margin and loopback tests further confirms its readiness for integration into customer designs, supporting future HPC and AI applications.
According to Mohit Gupta, SVP and GM of Custom Silicon and IP at Alphawave Semi, this milestone demonstrates the company’s expertise in delivering advanced connectivity solutions using TSMC’s 3DFabric™ ecosystem. TSMC’s Dan Kochpatcharin highlighted the partnership with Alphawave Semi as an example of their collaborative efforts to meet the increasing demands of AI and HPC through cutting-edge packaging technologies.
The UCIe IP subsystem is compliant with the latest UCIe Specification Rev 2.0 and includes features such as JTAG, BIST, DFT, and Known Good Die (KGD) capabilities, ensuring its robustness and testability. This release follows previous announcements, including the February 2024 confirmation of the silicon-proven 3nm UCIe IP subsystem with standard packaging, and the June introduction of a multi-protocol chiplet.
Alphawave IP Group plc (LON:AWE) is a semiconductor IP company focused on providing DSP based, multi-standard connectivity Silicon IP solutions targeting both data processing in the Datacenter and data generation by IoT end devices.
